JOB DUTIES:Design and verify standard cell schematics. Port schematics into new technologies. Create new schematics for new functionality requirements. Verify circuit robustness using Monte Carlo simulation. Characterize standard cell libraries for custom PVTS.Responsibilities:Run spice simulations for circuits that include Transmitter, Receiver – CTLE/DFE, DLL, DAC, OpAmp, Comparator and voltage regulators.Work on tools and document best methodsPreferred Skilled Sets:Good knowledge of IO and system integration (signaling/equalization techniques, signal integrity, power integrity).Ability to dig into RTL or FW code supporting the custom circuit implementation.EXPERIENCE AND EDUATION:0-2 years of relevant work experience; Experience with Schematic Design; Experience with Circuit Stimulation using Spice; Experience in Standard Cell Characterization using industry standard tools.Education RequirementsBachelors, Masters or PHD in EE or Comp. Eng
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