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Design Verification Engineer

Austin, TX

12.0 Months

Full-Time $17-$22/hr

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Posted: Jul 14, 2026

Ref: GDTXE148

Position Overview

JOB DUTIES:
Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort. Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system. Be responsible for carefully documenting and executing test plan(s) consisting of directed and constrained-random tests to be run during simulation. Be expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects. Be familiar with hardware modeling and/or assertion-based verification methods.

EXPERIENCE AND EDUCATION:
8-10 years of proven verification experience on large ASIC development projects or software/firmware experience in a hardware development setting;
Strong background in C/C++ development in a Linux Environment;
Strong debug skills and experience with debug tools such as Gdb, Valgrind;
Proficient in Object Oriented programming, STL, computer architecture and data structures;
Knowledge of Perl and Makefiles;
Experience in Verilog/SystemVerilog/SystemC, preferred;
Experience in C/Verilog environment using DPI/PLI, preferred;
Strong analytical skills and attention to detail;
Excellent written and communication skills

Must-Have Requirements
8–10+ years of hand-on Design Verification experience in IP/Sub-system environments.
Expertise in SystemVerilog and UVM-based verification methodologies.
Solid experience developing verification plans, testbenches, sequences, monitors, scoreboards, and coverage models.
Strong debugging skills across RTL, testbench, and simulation failures.
Strong execution mindset with a proven ability to independently drive verification tasks to closure.
Nice-to-Have Requirements
Experience with fabric / interconnect / coherency / high-performance data path designs.
Familiarity with multiple configurations, scalability challenges, or parameterized environments.

VIVA is an equal opportunity employer. All qualified applicants have an equal opportunity for placement, and all employees have an equal opportunity to develop on the job. This means that VIVA will not discriminate against any employee or qualified applicant on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability or protected veteran status.

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Competitive Benefits

Your well-being Matters

Health & Future Fully Covered

At VIVA, employee well-being is paramount. Our comprehensive benefits package ensures your health, financial security, and quality of life are always prioritized.

Health Insurance

VIVA provides employees access to a comprehensive group health insurance plan (Medical, Dental, Vision, Basic Life, Term Life, and Accidental Death) through our flexible PPO plan-allowing you the freedom to choose healthcare providers.

401(k) Retirement Planning

Plan securely for your future with automatic payroll deductions into a tax-advantaged 401(k) retirement plan, including employer-matching contributions for eligible employees.

Performance Bonuses & Referrals

Earn performance-based bonuses and generous referral incentives of up to $500 when recommending talented candidates who become part of the VIVA family.

Biweekly Direct Deposit

Enjoy timely and convenient payroll with biweekly direct deposit to your chosen financial institution. Biweekly Direct Deposit

VIVA Perks Program

Access exclusive employee discounts and savings on electronics, travel, groceries, apparel, and more through our dedicated VIVA Perks Program.

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