PCB Schematic Capture Engineer

We are seeking an experienced PCB design contractor to support board design schematic capture for an upcoming project. This is for a hands-on engineer proficient in System Capture, responsible for producing accurate, well-documented schematics that feed downstream layout and manufacturing. Onsite work is preferred, but we will consider offsite/remote candidates based on relevant experience and skill level

Key Responsibilities
Create and maintain board-level schematics using System Capture, following established design standards and libraries.
Translate design requirements, reference designs, and block diagrams into complete, accurate schematic sheets.
Perform design rule checks (DRC) and electrical rule checks (ERC) to catch connectivity and annotation errors prior to release.
Collaborate with hardware engineers, PCB layout designers, and component engineering to resolve design issues and part-sourcing questions.
Generate and maintain schematic-related deliverables, including netlists, bill of materials (BOM) inputs, and design documentation.
Support design reviews and incorporate engineering change requests (ECRs/ECOs) into schematic revisions.
Maintain version control and documentation of schematic revisions throughout the project lifecycle.

Required Qualifications
Minimum 3 years of hands-on experience using Cadence “System Capture” for schematic capture.
Solid understanding of schematic design fundamentals, including component symbol creation, net naming conventions, and hierarchical/multi-sheet schematic structures.
Experience performing ERC/DRC checks and resolving connectivity or annotation errors.
Familiarity with generating netlists and BOM data from schematic capture tools.
Strong attention to detail and ability to work independently against project timelines.
Effective communication skills to collaborate with cross-functional hardware and layout teams.

Preferred Qualifications
Prior experience in board design AI hardware development.
Familiarity with PCB layout tools and the schematic-to-layout handoff process.

Notes:
Onsite