Memory FW EngineerThe Person:Will have strong analytical/problem-solving skills, pronounced attention to details, and ability to learn fast and execute complex processes. Must be self-starting, resourceful, and able to independently drive tasks to completion. Must have strong communication skills.The Role:The Memory IO team is looking for a passionate and experienced Firmware designer for infrastructure support of high-speed LPDDR, DDR and inter-chip IO IP development. Be a part of the definition, design and development and productization phase of industry-leading Memory PHYs and interface IP. This opportunity is part of the driving force that enables new PHY designs at the microarchitecture, firmware/hardware co-design, and algorithm design level.Be a part of a team that delivers Industry leading IP and help our experts in RTL, FW, circuit and architecture teams develop leading edge Memory interfaces.RESPONSIBILITIES:Implement and maintain complex continuous integration systems for the codebase in GitHub Actions to ensure robust build and test processes across diverse environments and systemsManage the code integration with external codebases to maintain compatibility and synchronization with other teams' code (both upstream and downstream components)Monitor the health of the main branch's CI, quickly detecting, tracing, and resolving failures to ensure stability and performanceCreate and manage releases using bespoke processes to ensure thorough QA and testing to meet quality standardsAssist teammates with conflict resolution and coordinate conflicting pull requests, optimizing GitHub workflows for efficiency if necessaryDebug system-level tests in multiple unique environments for comprehensive test coverage and reliabilityConduct post-silicon lab bring-up and optimization for DDR training, runtime operation, and diagnostic featuresPreference & Skill Sets :+5 years’ experience as firmware engineerExtensive experience with CI/CD, GitHub, and GitHub ActionsProficiency in C, C++, Python, and languages like JSON and YAMLAbility to quickly learn and apply new toolsets and frameworksExcellent written and verbal communication skillQuick learner, self-starting, independent, and ownership-mindedSystematic, analytical, and detailed-oriented approaches to issues involving complex systemsExperience with SERDES, DDR, Memory Controller DesignUnderstanding of computer organization/architecture is preferred.Laboratory experience, including the use of equipment: oscilloscopes, logic analyzers, etc is preferredEDUCATION:Bachelor’s degree in electrical or computer engineering is strongly desired. Master's or PhD degree is a plus.
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