Description:JOB DUTIES:Work with a large multi-site verification team on the verification of Graphics & CPU Cores / Coherency features for new CPU/GPU products. Will work with on test plans for SOC-level or full-chip features. Executes on test plans using a variety of directed and random stimulus, assertions, custom logic checkers, reference models and measured coverage. Contributes as an individual towards functional verification goals.EXPERIENCE AND EDUCATION:Must have a Masters degree in Electrical Engineering or Computer Engineering;3-5 years of experience with Graphics IP ASIC verification;3-5 years of experience and solid skills in Verilog, OVM/UVM, C/C++, Linux; Keen understanding of System Level issues & requirements;Demonstrated experience using vcs and verdi for functional verification and debugging a strong asset; Strong interpersonal skills for interaction with large team on multiple sites; Excellent verbal and written communication skills; Have a strong emphasis on meeting program requirements regarding features and schedules; Must be able to effectively manage concurrent work on multiple projectsInternal Description of ResponsibilitiesSummaryHLP’s set of tool dependencies experiences frequent intervention due to flux with the set of apps being analyzed, changes in the driver, firmware, and general infrastructure.Primary ResponsibilitiesTriage incoming issues from the HLP user base.Manage Jira issues assigned by the HLP team (for example, against GFXR) and work with the assigned engineers to drive a solution to the problem.Submit issues with HLP, as well as suggested enhancements, to the HLP Github Issues system.Drive number of HLP issues down to a reasonable level (currently at 184)Make code changes to HLP as directed by Giuseppe and myself. Essential Skills:Python 3 DevelopmentGit / GitHubDebugging experienceSelf-motivatedStrong communication skillsNice to have Experience:JIRAVsCodeGithub CopilotDX12, Vulkan-based engine developmentWeb tool development (React, MongoDB, SQL ) VIVA is an equal opportunity employer. All qualified applicants have an equal opportunity for placement, and all employees have an equal opportunity to develop on the job. This means that VIVA will not discriminate against any employee or qualified applicant on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability or protected veteran status
Description:JOB DUTIES:Work with a large multi-site verification team on the verification of Graphics & CPU Cores / Coherency features for new CPU/GPU products. Will work with on test plans for SOC-level or full-chip features. Executes on test plans using a variety of directed and random stimulus, assertions, custom logic checkers, reference models and measured coverage. Contributes as an individual towards functional verification goals.EXPERIENCE AND EDUCATION:Must have a Masters degree in Electrical Engineering or Computer Engineering;3-5 years of experience with Graphics IP ASIC verification;3-5 years of experience and solid skills in Verilog, OVM/UVM, C/C++, Linux; Keen understanding of System Level issues & requirements;Demonstrated experience using vcs and verdi for functional verification and debugging a strong asset; Strong interpersonal skills for interaction with large team on multiple sites; Excellent verbal and written communication skills; Have a strong emphasis on meeting program requirements regarding features and schedules; Must be able to effectively manage concurrent work on multiple projectsInternal Description of ResponsibilitiesSummaryHLP’s set of tool dependencies experiences frequent intervention due to flux with the set of apps being analyzed, changes in the driver, firmware, and general infrastructure.Primary ResponsibilitiesTriage incoming issues from the HLP user base.Manage Jira issues assigned by the HLP team (for example, against GFXR) and work with the assigned engineers to drive a solution to the problem.Submit issues with HLP, as well as suggested enhancements, to the HLP Github Issues system.Drive number of HLP issues down to a reasonable level (currently at 184)Make code changes to HLP as directed by Giuseppe and myself.
Essential Skills:Python 3 DevelopmentGit / GitHubDebugging experienceSelf-motivatedStrong communication skillsNice to have Experience:JIRAVsCodeGithub CopilotDX12, Vulkan-based engine developmentWeb tool development (React, MongoDB, SQL )
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